Freescale Semiconductor /MKL27Z4 /MCG /C1

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Interpret as C1

7 43 0 0 00 0 0 0 0 0 0 0 0 (0)IREFSTEN 0 (0)IRCLKEN 0 (00)CLKS

CLKS=00, IRCLKEN=0, IREFSTEN=0

Description

MCG Control Register 1

Fields

IREFSTEN

Internal Reference Stop Enable

0 (0): LIRC is disabled in Stop mode.

1 (1): LIRC is enabled in Stop mode, if IRCLKEN is set.

IRCLKEN

Internal Reference Clock Enable

0 (0): LIRC is disabled.

1 (1): LIRC is enabled.

CLKS

Clock Source Select

0 (00): Selects HIRC clock as the main clock source. This is HIRC mode.

1 (01): Selects LIRC clock as the main clock source. This is LIRC2M or LIRC8M mode.

2 (10): Selects external clock as the main clock source. This is EXT mode.

3 (11): Reserved. Writing 11 takes no effect.

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